Dr. Archana Rani is a dedicated academician and researcher with over 15 years of blended experience in teaching, research, and industry within the domain of Electronics and Communication Engineering. She specializes in FPGA-based digital system design, with a strong technical foundation in microprocessor architectures,digital system design. Her academic credentials include a Ph.D. in FPGA-Based Digital Design System, a Master’s in Electronics Product Design and Technology from Punjab Engineering College, Chandigarh, and a B.Tech in Electronics and Communication Engineering.
Dr. Archana has an outstanding research portfolio with over more than 20 publications in Scopus, SCI, IEEE, and other indexed journals, and she has successfully guided five Ph.D. scholars. Her doctoral work focused on the design and implementation of a 32-bit asynchronous microprocessor on FPGA, achieving significant improvements in area, power, and timing efficiency.
She has held academic positions at reputed institutions including G.D. Goenka University, Army Institute of Technology (Pune University), and MRIIRS, and has also worked as an R&D Engineer at Havells India Ltd, also she gained valuable international industry exposure during her tenure at PLP Australia. Her teaching expertise spans subjects such as Digital Electronics, Microprocessors, VHDL and Computer Architecture. A recipient of multiple academic accolades and scholarships, Dr. Archana combines strong analytical skills with a passion for research-driven teaching and innovation in electronics education.
Education
B.Tech, M.Tech., Ph.D.
Publications:
Novel design of 32-bit Asynchronous (RISC) Microprocessor & its implementation on FPGA” MECS – IJIEEB Journal, Hong Kong Indexed: Google Scholar
“FPGA Based Design of Microprocessor and its Implementation using VIVADO” BEEI – IAES, Indonesia (June 2018) Indexed: Scopus, Elsevier
“A Novel Approach for Asynchronous Microprocessor Design and its Implementation on FPGA” BEEI – IAES, Indonesia (June 2019) Indexed: Scopus, Elsevier
“Synthesis & Optimization of Asynchronous Processor using Xilinx ISE & Vivado” IJCESR, India Indexed: UGC Approved
“VHDL Design and Implementation of Control Unit of Asynchronous Microprocessor” IEEE NANOFIM 2017, GBU India Indexed: IEEE Conference
“An Initiative towards Asynchronous Microprocessor Design & its Implementation using VIVADO and ISE” ICN:3I-2017, IIT Roorkee Indexed: National Conference
Power Systems & Renewable Energy “Implementation and Performance Evaluation of Grid-Tied PMSG Based Wind Energy System Using Intelligent Controller” Design Engineering Indexed: Scopus
“Interval Type-2 Fuzzy Based Performance of Dynamic Voltage Restorer for Compensation of Voltage Sag” Design Engineering Indexed: Scopus
“Comparative Analysis of PI Controller and Fuzzy Logic Controller for DVR Performance” JUSST (Journal of University of Shanghai for Science and Technology) Indexed: Scopus
“Deep Q Reinforcement Learning to Improve the MPPT in Solar Cell” Web Science Journal (Advances and Applications in Mathematical Sciences) Indexed: Scopus
“MPPT Controller for PV Array with Fractional Order Controller” Journal of Xidian University Indexed: Scopus
“Reinforcement Learning Based MPPT Control for Induction Motor Fed PV Array” Journal of Solid State Technology Indexed: Scopus
Research Interests:
Digital System Design
Conferences:
Faculty Development Programs (FDPs) Upskilling on Higher Education, G.D. Goenka University, 15–20 July 2024 VLSI Technologies, G.D. Goenka University, 25–30 November 2024 MATLAB, G.D. Goenka University, 14–18 July 2025
Conferences / Workshops Attended Wireless and Optical Communication (WOC) Conference, PEC Chandigarh, 13–15 Dec 2007 IDEA-2008, B.G.I.E.T. Sangrur, Jan 2008 National Level Conference, S.U.S.C.E.T. Tangori (Punjab), Apr 2008 Conference on Nanotechnology, MRIU Faridabad, 2010 Ethics & Moral Values Workshop, MRIU, May 2011 Wipro Workshop, MRIU, July 2011 High Impact Factor Workshop, MRIU, 2011 Future Mobile Radio Communication Conference, MRIU, 17 Sept 2011
Publications / Presentations/Conferences Archana Rani, “Dynamic Spectrum Access Techniques in Cognitive Radio Networks: A Survey”, IJETSE (International Journal–Canada), March 2012. Archana Bhatia, Dr. Neelam Rup Prakash, Er. Dilip Kumar, “An Application of RFID Technology for Automated Toll Collection and Management System”, National Conference, S.U.S.C.E.T. Tangori (Punjab), April 2008.
Archana Bhatia, Dr. Neelam Rup Prakash, Er. Dilip Kumar, “RFID Based Automatic Toll Collection & Management System”, “IDEA-2008” National Conference, Bhai Gurdas Institute of Engineering & Technology, Sangrur, Jan 2008.
Archana Rani, “An Embedded Based Message Service System of Students Arriving/Leaving Safely Using RFID Technology”, National Conference ICT: Theory, Applications and Practice, Sir Padampat Singhania University, Udaipur, 5–6 March 2010.
Archana Bhatia, Nikhil Dev Garg, “Nanotechnology”, NIT Hamirpur, 2007.
Archana Bhatia, Nikhil Dev Garg, “Smart Materials”, NIT Hamirpur, 2007.
Archana Bhatia, “Analysis of Face Recognition Using Novel Algorithm Technique”, MRIU Faridabad, Sept 2011.
Archana Rani,”Dynamic Spectrum Access Techniques in Cognitive Radio Networks: A Survey”, at IJETSE (International Journal-Canada), march2012.
Archana Bhatia, Dr. Neelam Rup Prakash, Er. Dilip Kumar “An Application of RFID Technology for Automated Toll Collection and Management System”, at national conference by S.U.S.C.E.T. (Tangori), april 2008.
Archana Bhatia, Dr. Neelam Rup Prakash, Er. Dilip Kumar “ RFID Based Automatic Toll Collection & Management System”, at “IDEA-2008” National Conference organized by Bhai Gurdas Institute of Engineering & Technology (Sangrur).
Archana Rani, “An embedded based message service system of students arriving/leaving safely using RFID Technology”, at National conference ICT: theory, applications and practice on 5-6th march 2010 by Sir Padampat Singhania University, Udaipur.
Archana Bhatia, Nikhil Dev Garg,”Nanotechnology” at NIT Hamirpur in year 2007.
Archana Bhatia, Nikhil Dev Garg,”Smart Materials” at NIT Hamirpur in year 2007.
Archana Bhatia “Analysis of face reorganization using noval algorithm technique”, at MRIU Faridabad, sept. 2011.
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